Amplifiers Comparators Multipliers Filters and Oscillators 2nd Edition by Tertulien Ndjountche ISBN 9780429939105 0429939108

1. MOS Transistors

1.1 Transistor Structure
1.1.1 I-V Characteristics of MOS Transistors
1.1.2 Drain Current in the Strong Inversion Approximation
1.1.3 Drain Current in the Subthreshold Region
1.1.4 MOS Transistor Capacitances
1.1.5 Scaling Effects on MOS Transistors
1.2 Transistor SPICE Models
1.2.1 Electrical Characteristics
1.2.2 Temperature Effects
1.2.3 Noise Models
1.3 Drain-Source Current Valid in All Regions of Operation
1.4 Small-Geometry Effects
1.5 Design-Oriented MOSFET Models
1.5.1 Small-Signal Transconductances
1.5.2 Transistor Parameters in Various CMOS Technologies
1.5.3 Capacitances
1.6 Summary
1.7 Circuit Design Assessment
Bibliography

2. Physical Design of MOS Integrated Circuits

2.1 MOS Transistors
2.1.1 MOS Field-Effect Transistor
2.1.2 Fin Field-Effect Transistor
2.2 Passive Components
2.2.1 Capacitors
2.2.2 Resistors
2.2.3 Inductors
2.3 Integrated-Circuit (IC) Interconnects
2.4 Physical Design Considerations
2.5 IC Packaging
2.6 Summary
2.7 Circuit Design Assessment
Bibliography

3. Bias and Current Reference Circuits

3.1 Current Mirrors
3.1.1 Simple Current Mirror
3.1.2 Cascode Current Mirror
3.1.3 Low-Voltage Active Current Mirror
3.2 Current and Voltage References
3.2.1 Supply-Voltage Independent Current and Voltage References
3.2.2 Bandgap References
3.2.2.1 Low-Voltage Bandgap Voltage Reference
3.2.2.2 Curvature-Compensated Bandgap Voltage Reference
3.2.3 Floating-Gate Voltage Reference
3.3 Summary
3.4 Circuit Design Assessment
Bibliography

4. CMOS Amplifiers

4.1 Differential Amplifier
4.1.1 Dynamic Range
4.1.2 Source-Coupled Differential Transistor Pair
4.1.3 Current Mirror
4.1.4 Slew-Rate Limitation
4.1.5 Small-Signal Characteristics
4.1.6 Offset Voltage
4.1.7 Noise
4.1.8 Operational Amplifier
4.2 Linearization Techniques for Transconductors
4.3 Transconductor Operating in the Subthreshold Region
4.4 Single-Stage Amplifier
4.5 Folded-Cascode Amplifier
4.6 Fully Differential Amplifier Architectures
4.6.1 Fully Differential Folded-Cascode Amplifier
4.6.1.1 Basic Structure
4.6.1.2 Gain-Enhanced Structure
4.6.2 Telescopic Amplifier
4.6.3 Common-Mode Feedback Circuits
4.6.3.1 Continuous-Time Common-Mode Feedback Circuit
4.6.3.2 Switched-Capacitor Common-Mode Feedback Circuit
4.6.4 Pseudo Fully Differential Amplifier
4.7 Multistage Amplifier Structures
4.7.1 Output Stage
4.7.2 Two-Stage Amplifier
4.7.3 Optimization of a Two-Pole Amplifier for Fast Settling Response
4.7.4 Three-Stage Amplifier
4.8 Rail-to-Rail Amplifiers
4.8.1 Amplifier with a Class AB Input Stage
4.8.2 Two-Stage Amplifier with Class AB Output Stage
4.8.3 Amplifier with Rail-to-Rail Input and Output Stages
4.9 Amplifier Characterization
4.9.1 Finite Gain and Bandwidth
4.9.2 Phase Margin
4.9.3 Input and Output Impedances
4.9.4 Power-Supply Rejection
4.9.5 Slew Rate
4.9.6 Low-Frequency Noise and DC Offset Voltage
4.9.6.1 Auto-Zero Compensation Scheme
4.9.6.2 Chopper Technique
4.10 Summary
4.11 Circuit Design Assessment
Bibliography

5. Nonlinear Analog Components

5.1 Comparators
5.1.1 Amplifier-Based Comparator
5.1.2 Comparator Using Charge Balancing Techniques
5.1.3 Latched Comparators
5.1.3.1 Static Comparator
5.1.3.2 Dynamic Comparator
5.2 Multipliers
5.2.1 Multiplier Cores
5.2.1.1 Multiplier Core Based on Externally Controlled Transconductances
5.2.1.2 Multiplier Core Based on the Quarter-Square Technique
5.2.1.3 Design Issues
5.2.2 Design Examples
5.3 Summary
5.4 Circuit Design Assessment
Bibliography

6. Continuous-Time Circuits

6.1 Wireless Communication System
6.1.1 Receiver and Transmitter Architectures
6.1.2 Frequency Translation and Quadrature Multiplexing
6.1.3 Architecture of a Harmonic-Rejection Transceiver
6.1.4 Amplifiers
6.1.4.1 Power Amplifier
6.1.4.2 Low-Noise Amplifier
6.1.5 Mixer
6.1.6 Voltage-Controlled Oscillator
6.1.7 Automatic Gain Control
6.2 Continuous-Time Filters
6.2.1 RC Circuits
6.2.2 MOSFET-C Circuits
6.2.3 gm-C Circuits
6.2.4 gm-C Operational Amplifier (OA) Circuits
6.2.5 Summer Circuits
6.2.6 Gyrator
6.3 Filter Characterization
6.4 Filter Design Methods
6.4.1 First-Order Filter Design
6.4.2 Biquadratic Filter Design Methods
6.4.2.1 Signal-Flow Graph-Based Design
6.4.2.2 Gyrator-Based Design
6.4.3 Ladder Filter Design Methods
6.4.3.1 LC Ladder Network-Based Design
6.4.3.2 Signal-Flow Graph-Based Design
6.5 Design Considerations for Continuous-Time Filters
6.5.1 Automatic On-Chip Tuning of Continuous-Time Filters
6.5.2 Nonideal Integrator
6.6 Frequency-Control Systems
6.6.1 Phase-Locked-Loop-Based Technique
6.6.1.1 Operation Principle
6.6.1.2 Architecture of the Master: VCO or VCF
6.6.1.3 Phase Detector
6.6.1.4 Implementation Issues
6.6.2 Charge Comparison-Based Technique
6.7 Quality-Factor and Bandwidth Control Systems
6.7.1 Magnitude-Locked-Loop-Based Technique
6.7.2 Envelope Detection-Based Technique
6.8 Practical Design Considerations
6.9 Other Tuning Strategies
6.9.1 Tuning Scheme Using an External Resistor
6.9.2 Self-Tuned Filter
6.9.3 Tuning Scheme Based on Adaptive Filter Technique
6.10 Summary
6.11 Circuit Design Assessment
Bibliography

7. Switched-Capacitor Circuits

7.1 Anti-Aliasing Filter
7.2 Capacitors
7.3 Switches
7.3.1 Switch Description
7.3.2 Switch Error Sources
7.3.3 Switch Compensation Techniques
7.4 Programmable Capacitor Arrays
7.5 Operational Amplifiers
7.6 Track-and-Hold (T/H) and Sample-and-Hold (S/H) Circuits
7.6.1 Open-Loop T/H Circuit
7.6.2 Closed-Loop T/H Circuits
7.7 Switched-Capacitor (SC) Circuit Principle
7.8 SC Filter Design
7.8.1 First-Order Filter
7.8.2 Biquad Filter
7.8.3 Ladder Filter
7.9 SC Ladder Filter Based on the LDI Transform
7.10 SC Ladder Filter Based on the Bilinear Transform
7.10.1 RLC Filter Prototype-Based Design
7.10.2 Transfer Function-Based Design of