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Computer Organization and Design RISC V Edition The Hardware Software Interface The Morgan Kaufmann Series in Computer Architecture and Design 2nd Edition by David Patterson, John Hennessy ISBN 0128203315 9780128203316

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ISBN 10:   0128203315
ISBN 13: 978-0128203316
Author:     David A. Patterson, John L. Hennessy

Computer Organization and Design RISC-V Edition: The Hardware Software Interface, Second Edition, the award-winning textbook from Patterson and Hennessy that is used by more than 40,000 students per year, continues to present the most comprehensive and readable introduction to this core computer science topic. This version of the book features the RISC-V open source instruction set architecture, the first open source architecture designed for use in modern computing environments such as cloud computing, mobile devices, and other embedded systems. Readers will enjoy an online companion website that provides advanced content for further study, appendices, glossary, references, links to software tools, and more.

  • Covers parallelism in-depth, with examples and content highlighting parallel hardware and software topics
  • Focuses on 64-bit address, ISA to 32-bit address, and ISA for RISC-V because 32-bit RISC-V ISA is simpler to explain, and 32-bit address computers are still best for applications like embedded computing and IoT
  • Includes new sections in each chapter on Domain Specific Architectures (DSA)
  • Provides updates on all the real-world examples in the book

Computer Organization and Design RISC V 2nd Table of contents:

1. Computer Abstractions and Technology 
 
1.1. Introduction 
 
1.2. Seven Great Ideas in Computer Architecture 
 
1.3. Below Your Program 
 
1.4. Under the Covers 
 
1.5. Technologies for Building Processors and Memory 
 
2. Instructions: Language of the Computer 
 
2.1. Introduction 
 
2.2. Operations of the Computer Hardware 
 
2.3. Operands of the Computer Hardware 
 
2.4. Signed and Unsigned Numbers 
 
2.5. Representing Instructions in the Computer 
 
2.6. Logical Operations 
 
2.7. Instructions for Making Decisions 
 
3. Arithmetic for Computers 
 
3.1. Introduction 
 
3.2. Addition and Subtraction 
 
3.3. Multiplication 
 
3.4. Division 
 
3.5. Floating Point 
 
4. The Processor 
 
4.1. Introduction 
 
4.2. Logic Design Conventions 
 
4.3. Building a Datapath 
 
4.4. A Simple Implementation Scheme 
 
4.6. An Overview of Pipelining 
 
5. Large and Fast: Exploiting Memory Hierarchy 
 
5.1. Introduction 
 
5.2. Memory Technologies 
 
5.3. The Basics of Caches 
 
5.4. Measuring and Improving Cache Performance 
 
5.5. Dependable Memory Hierarchy 
 
6. Parallel Processors from Client to Cloud 
 
6.1. Introduction 
 
6.2. The Difficulty of Creating Parallel Processing Programs 
 
6.3. SISD, MIMD, SIMD, SPMD, and Vector 
 
6.4. Hardware Multithreading 
 
6.5. Multicore and Other Shared Memory Multiprocessors

 

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